This invention relates to the field of video signal processing, and, more particularly, to chrominance signal processing devices and methods.
The signal amplitude of a video signal has to be controlled before the chrominance sub-carrier can be demodulated. This function is done by amplifying the sub-carrier E using a variable gain amplifier 10, the gain of which is controlled by a loop, as shown in FIG. 1. This circuit is well known to experts in the field, and is described in an article titled xe2x80x9cFundamental Television Course; Emission-Reception-Televisionxe2x80x9d by R. Besson, Editions Radio, fifth edition, Chapter XXIII, pages 400-415. This circuit includes a variable gain amplifier 10 having an output connected to a level measurement circuit 11 followed by a filter circuit 12. The output of the filter circuit 12 is connected to the gain control of the amplifier 10. The output of the variable gain amplifier 10 is the regulated sub-carrier output S.
Signals may be frequency, phase or amplitude modulated, depending on the transmission standard. To provide precise regulation, the gain is measured and adjusted during transmission of a reference burst 13 located at the beginning of each video scanning line, as shown in FIG. 2. Throughout the duration of the line, the amplifier gain is kept at the value obtained after the regulation phase at the beginning of the line. This type of regulation loop is often called AGC (Automatic Gain Control) or ACC (Automatic Color Control).
The line signal amplitude that corresponds to color saturation is variable depending on the content of the transmitted picture. Furthermore, since the duration of the reference burst is very short, e.g., 2 or 3 microseconds, it is subject to deterioration. Since the demodulator linearity range is limited, a device is needed to reduce the amplifier gain if the signal is too strong on the line signal. Normally, the line signal amplitude must not be more than 2.6 times the amplitude of the reference burst.
This device is designed to prevent overload of the demodulator, and is frequently called the ACC overload. This device must only be active above a threshold defined as a function of the video signal transmission standard. The most frequent embodiments of this type of device make use of analog regulation loops like those shown in FIG. 3.
In the circuit illustrated in FIG. 3, there is a first loop comprising a first variable gain amplifier 20 into which the sub-carrier E is applied as an input. The first variable gain amplifier 20 is followed by a second variable gain amplifier 21 in which the output is connected to a level measurement circuit 22. This output is the regulated sub-carrier output S. A first output of the level measurement circuit 22 is connected to a burst comparison circuit 23. The output of the burst comparison circuit 23 is connected to the gain control of the first amplifier 20, and to a first capacitor C1 which is connected to ground. A second loop including the second variable gain amplifier 21 is connected to the level measurement circuit 22. A second output of the level measurement circuit 22 is connected to a line comparison circuit 24. The output of the line comparison circuit 24 is connected to the gain control of the second variable gain amplifier 21, and to a second capacitor C2 which is connected to ground.
In the first loop, the signal amplitude is measured at the output from the second variable gain amplifier 21 and is then compared with a reference burst. The signal obtained is used to charge or discharge the first capacitor C1, depending on the sign of the comparison. The gain control of the first variable gain amplifier 20 is controlled by the voltage of the capacitor C1 that then filters the first loop. A capacitor C1 with a sufficiently high value, e.g., greater than one microfarad, has to be used to obtain a time constant on the order of 300 to 400 lines. The charge and discharge system must be made to obtain a longer time constant for an increasing gain than for a reducing gain.
In the second loop (ACC overload) there is a second filter capacitor C2, and the second variable gain amplifier 21. Time constants are also very different in this loop. The gain should be made to decrease more quickly when the modulation level during the line exceeds the maximum threshold. However, the return to normal gain takes place with a very long time constant on the order of 400 to 1000 lines.
This type of circuit has the disadvantage because it requires two external capacitors C1 and C2 during integration. Therefore, two outputs are required on the integrated circuit, and two variable gain amplifiers 20 and 21 are also required.
An object of the invention is to provide a device for regulation of the amplitude of a chrominance signal that no longer requires the above described two filter capacitors, and therefore, no longer requires the two outputs on the integrated circuit. Consequently, a single variable gain amplifier may be used instead of two variable gain amplifiers.
A device for regulation of the amplitude of the chrominance signal includes a variable gain amplifier into which the sub-carrier signal is input. The variable gain amplifier outputs a regulated sub-carrier signal, the gain of which is controlled by two regulation loops. The first regulation loop occurs during the reference burst, and the second regulation loop occurs during the visible line. Each of these loops includes an up/down counter controlled by a clock. The up/down counter includes a digital-analog converter controlled by another clock, into which the output signals from these first and second up/down counters are applied as inputs. The output signal of the digital-analog converter is connected to the amplifier gain control.
The digital-analog converter is advantageously non-linear. It satisfies the relation Gn=Kan, where n is the converter input code and K and a are constants. Advantageously, the device according to the invention includes means for multiplexing regulation magnitudes.
In one advantageous embodiment, the device according to the invention includes a peak-to-peak level measurement circuit connected to the first inputs of a first and a second comparator. The second inputs of these comparators are connected to the inputs of two switches, each switch is controlled by the reference burst signal. The two switches select first and second thresholds among two pairs of thresholds. The outputs of the comparators are connected to the corresponding inputs of two additional switches controlled by the reference burst signal. The first outputs from these two switches are connected to the corresponding two inputs of a first clock control device, and their second outputs are connected to the corresponding two inputs of a second clock control device.
The first clock control device receives the output from a first clock, and is followed by the first up/down counter. The second clock control device receives the output from a second clock and is followed by the second up/down counter. The output from the first up/down counter is connected directly to the first input of an adder. The output from the second up/down counter is connected to the second input of this adder through a switch controlled by the reference burst signal. The output from this adder is connected to the input of the digital-analog converter.
Advantageously, up/down counters and the digital-analog converter are seven bit devices. The chrominance signal amplitude regulation device according to the invention has the following advantages. There are no components external to the integrated circuit. Only one controlled gain amplifier is necessary, which improves the signal-to-noise ratio. The main time constants can be flexibly programmed. Digital information about the input signal level can be used externally. This invention also relates to an integrated circuit for processing of chrominance signals comprising the device described above.